2017 Session M1 (plenary): Devices, Chair: Kevin Williams

Silicon photonics: from present status to future developments

Piero ORLANDI, Marco PIAZZA, Luca MAGGI, Antonio CANCIAMILLA Giuseppe CUSMAI, Matteo TRALDI, Charles BAUDOT, Antonio FINCATO STMicroelectronics Agrate, Via Camillo Olivetti 2, Agrate Brianza, 20864, Italy STMicroelectronics Crolles, Rue Jean Monnet 850, Crolles, 38920, France STMicroelectronics Castelletto, Via Tolomeo 1, Cornaredo, 20010, Italy piero.orlandi@st.com

Silicon photonics gathered a great amount of investments during the last decade. Both research centres and major industries directed their resources towards this promising technology. As a result, different technological platforms have been proposed [1- 7] and some of them are now accessible through multi-project wafer services. This interest was fuelled by the idea of exploiting CMOS fabs capability to implement a large scale industrialization of low cost and highly integrated electro-optic chips. The amount of digital data exchanged is in fact constantly increasing: by the end of 2020 global IP traffic will reach 2.3 ZB per year, growing at a compound annual growth rate (CAGR) of 22% [8]. This trend is pushing the need for high data-rate optical communication systems toward shorter and shorter distances, from intra-data centers to on-board and on-chip communications [9]. Silicon photonics is seen as the most promising technology to reach the required cost per bit and level of integration and nowadays its evolution is mainly driven by the data centers market.


Ultralow-capacitance opto-electronic devices for femtojoule/bit photonics

Kengo NOZAKI, Shinji MATSUO, Takuro FUJII, Koji TAKEDA, Eiichi KURAMOCHI, Akihiko SHINYA, and Masaya NOTOMI
Nanophotonics Center, NTT Basic Research Laboratories, NTT Device Technology Laboratories, NTT Corporation, 3-1, Morinosato Wakamiya Atsugi, Kanagawa 243-0198, Japan

Future microprocessors will need an unprecedented many-core architecture providing chip-scale optical communication, and for on-chip-com networks in particular, this architecture should be fully integrated with transmitters, photoreceivers, and other functional nanophotonic devices with low energy consumption. One of the challenges with these opto-electronic devices is to realize a device capacitance (C) as small as the fF level or less. Such devices are able to operate in the femtojoule/bit energy regime, which is required for future chip-scale photonic technology.


Germanium-on-Silicon Photonic Devices

Department of Materials Engineering
The University of Tokyo, 7-3-1 Hongo, Bunkyo
Tokyo, 113-8656, Japan

Ge epitaxial layers on Si have been studied for near-infrared (NIR) photodiodes (PDs) in Si photonics as well as for optical modulators and lasers. In this presentation, our recent progresses [1-5] are presented on waveguide-integrated vertical pin PDs using Ge epitaxial layers grown on Si-on-insulator (SOI) layers as well as Ge/SiGe heterostructure technologies for higher-performance photonic devices.